发明名称 BUILT-IN SELF-TEST METHOD AND STRUCTURE
摘要 A method of testing a semiconductor wafer and a related structure. In various embodiments, a method includes: placing a probe on a first chip on the semiconductor wafer; testing a scribe line automatic built-in self-test (ABIST) for the first chip to search for a fault; progressively testing a subsequent scribe line ABIST for a subsequent chip on the semiconductor wafer in response to determining the ABIST for the first chip does not indicate the fault; moving the probe point to the subsequent chip and retesting the subsequent scribe line ABIST in response to determining the ABIST for the subsequent chip indicates a fault; and testing a further subsequent scribe line ABIST for a further subsequent chip on the semiconductor wafer in response to determining the retesting of the subsequent scribiline ABIST does not indicate a fault in the subsequent scribe line ABIST.
申请公布号 US2013265068(A1) 申请公布日期 2013.10.10
申请号 US201213443450 申请日期 2012.04.10
申请人 AMOAH YOBA;ELLIS-MONAGHAN JOHN J.;KUO ROGER C.;LEITCH MOLLY J.;ZHANG ZHIHONG;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 AMOAH YOBA;ELLIS-MONAGHAN JOHN J.;KUO ROGER C.;LEITCH MOLLY J.;ZHANG ZHIHONG
分类号 G01R31/3187 主分类号 G01R31/3187
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