SILICON CARBIDE VERTICAL MOSFET AND MANUFACTURING METHOD OF THE SAME

摘要

PROBLEM TO BE SOLVED: To achieve both of improvement in element withstanding voltage and reduction in on-resistance at the same time by generating a depletion layer at a joint surface between a drift layer which is an n-type withstanding voltage region and a high-concentration p-type layer even when an impurity concentration of the drift layer of the silicon carbide vertical MOSFET is increased.SOLUTION: A silicon carbide vertical MOSFET comprises: a first conductivity type well region selectively formed on a surface of a substrate 1; an interlayer insulation film 13 which is formed via a gate insulation film 8 and a gate poly-Si electrode 9, on at least a part of a surface exposed part of a second conductivity type third semiconductor layer 21 sandwiched between a first conductivity type source region 5 and the first conductivity type well region; a source electrode 10 which contacts surfaces of the first conductivity type source region 5 and the third semiconductor layer 21 in common; and a drain electrode 11 formed on a rear face of the silicon carbide substrate 1. At least one layer of high-concentration and second conductivity type semiconductor layers 3, 31 is formed inside the first semiconductor layer 2 on the same position.