| 摘要 |
Disclosed herein is a device that includes: a first timing adjustment circuit generating a first control signal based on a command and an output buffer outputting a plurality of data sets in a serial at a timing based on the first control signal; and a second semiconductor chip including: a plurality of holding circuits holding the data sets in parallel, a second timing adjustment circuit generating a second control signal based on the command, and an input buffer sequentially capturing the data sets supplied from the holding circuits based on the second control signal. |
