发明名称 Managing Coherent Memory Between an Accelerated Processing Device and a Central Processing Unit
摘要 Existing multiprocessor computing systems often have insufficient memory coherency and, consequently, are unable to efficiently utilize separate memory systems. Specifically, a CPU cannot effectively write to a block of memory and then have a GPU access that memory unless there is explicit synchronization. In addition, because the GPU is forced to statically split memory locations between itself and the CPU, existing multiprocessor computing systems are unable to efficiently utilize the separate memory systems. Embodiments described herein overcome these deficiencies by receiving a notification within the GPU that the CPU has finished processing data that is stored in coherent memory, and invalidating data in the CPU caches that the GPU has finished processing from the coherent memory. Embodiments described herein also include dynamically partitioning a GPU memory into coherent memory and local memory through use of a probe filter.
申请公布号 US2013262776(A1) 申请公布日期 2013.10.03
申请号 US201213601126 申请日期 2012.08.31
申请人 ASARO ANTHONY;NORMOYLE KEVIN;HUMMEL MARK;ATI TECHNOLOGIES ULC;ADVANCED MICRO DEVICES, INC. 发明人 ASARO ANTHONY;NORMOYLE KEVIN;HUMMEL MARK
分类号 G06F12/08 主分类号 G06F12/08
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