发明名称 |
INTEGRATED CIRCUITS WITH MULTI-STAGE LOGIC REGIONS |
摘要 |
A programmable logic region on a programmable integrated circuit may include a first set of look-up tables that receive programmable logic region input signals and a second set of look-up tables that produce programmable logic region output signals. Multiplexer circuitry may be interposed between the first and second sets of look-up tables. The multiplexer circuitry may receive the programmable logic region input signals in parallel with the output signals from the first set of look-up tables and may provide corresponding selected signals to the second set of look-up tables. The programmable logic region input signals may be shared by the first and second sets of look-up tables. Logic circuitry may be coupled to outputs of the first and second sets of look-up tables. The logic circuitry may be configured to logically combine output signals from the first and second sets of look-up tables.
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申请公布号 |
US2013257476(A1) |
申请公布日期 |
2013.10.03 |
申请号 |
US201213434847 |
申请日期 |
2012.03.29 |
申请人 |
CASHMAN DAVID;LEWIS DAVID;MANOHARARAJAH VALAVAN |
发明人 |
CASHMAN DAVID;LEWIS DAVID;MANOHARARAJAH VALAVAN |
分类号 |
H03K19/20 |
主分类号 |
H03K19/20 |
代理机构 |
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