| 摘要 |
PROBLEM TO BE SOLVED: To obtain a ceramic multilayer substrate and a semiconductor package having such a structure that the line length of external connection tracks is reduced to the shortest possible while maintaining the airtightness of a cavity where a chip part is mounted.SOLUTION: The semiconductor package comprises: a top cover fitting section 6 formed in an annular shape so as to surround a mounting region where a chip part 1 is mounted, on which a top cover 5 is placed to form an airtight area 7 by hermetically sealing the chip part 1 mounted in the mounting region; a circuit pattern 9a formed so as to be exposed to the surface of a ceramic multilayer substrate 3 at a place more inside than the inner peripheral surface of the top cover fitting section 6 and connected to the chip part 1; a circuit pattern 9b formed on a ceramic base material 8 one layer above a layer where the circuit pattern 9a is formed and at a place on the outside of the inner peripheral surface of the top cover fitting section 6, partly overlapping the circuit pattern 9a and exposed to the surface of the ceramic multilayer substrate 3 at a place more outside than the outer peripheral surface of the top cover fitting section 6; and a via 12a formed in a portion where the circuit patterns 9a and 9b overlap, connecting the circuit patterns 9a and 9b together. |
