发明名称 TRENCH-TYPE INSULATED GATE MOS SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a trench-type insulated gate MOS semiconductor device which has low on-resistance, a large current density and a large withstand capability at the time of avalanche breakdown, and which can reduce overshoot voltage at the time of turn-off.SOLUTION: A trench-type insulated gate MOS semiconductor device comprises: first inter-trench surface regions in which a surface of a p type base region 12 and a surface of an n type semiconductor substrate 11 are alternately and repeatedly arranged on a surface among a plurality of trenches 13 of trenches having a plurality of linear and parallel surface patterns in a longer direction of the trench 13, and an emitter electrode 19 conductively contacts both surfaces of an n type emitter region 16 and a ptype body region 17 in the surface of the p type base region 12 commonly; and second inter-trench surface regions each of which lies on the surface along the longer direction of the trench 13 and is occupied by either of the surface of the p type base region 12 or the surface of the n type semiconductor substrate 11.
申请公布号 JP2013191896(A) 申请公布日期 2013.09.26
申请号 JP20130140305 申请日期 2013.07.04
申请人 FUJI ELECTRIC CO LTD 发明人 YOSHIKAWA ISAO
分类号 H01L29/739;H01L29/78 主分类号 H01L29/739
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