| 摘要 |
<p>A processing apparatus includes: a first register file; a second register file for holding a part of data held by the first register file; an operation means for performing an operation using data read from the second register file and for outputting an operation result as output data; and an instruction means for issuing a write instruction to write the output data and an error detection code for it to both of the first and second register files, and first and second occurrence instructions to generate respective simulated faults in the first and second register files. The processing apparatus further includes: a first control means for issuing a first generation instruction upon receipt of the write instruction and the first occurrence instruction; a first generation means for generating first simulated fault data according to the output data and the error detection code to output the first simulated fault data to the first register file upon receipt of the first generation instruction; and also a similar second control means and a similar second generation means.</p> |
