发明名称 |
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH REDUCED ELECTRICAL PARAMETER VARIATION |
摘要 |
Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming a gate stack on a semiconductor substrate. In the method, a first halo implantation is performed on the semiconductor substrate with a first dose of dopant ions to form first halo regions therein. A second halo spacer is formed around the gate stack. Then a second halo implantation is performed on the semiconductor substrate with a second dose of dopant ions to form second halo regions therein.
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申请公布号 |
US2013244388(A1) |
申请公布日期 |
2013.09.19 |
申请号 |
US201213421604 |
申请日期 |
2012.03.15 |
申请人 |
SCHEIPER THILO;FLACHOWSKY STEFAN;PANDEY SHESH MANI;GLOBALFOUNDRIES INC. |
发明人 |
SCHEIPER THILO;FLACHOWSKY STEFAN;PANDEY SHESH MANI |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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