发明名称
摘要 Provided is a test system of a semiconductor integrated circuit including an output device and an input device for conducting an input/output characteristics test of the output device and the input device inside the semiconductor integrated circuit. In the system, a transmission line provided in a test board where the semiconductor integrated circuit is mounted on establishes a wired connection between an external terminal of one circuit of one of the output device and the input device and external terminals of a plurality of circuits of another one of the output device and the input device.
申请公布号 JP5290054(B2) 申请公布日期 2013.09.18
申请号 JP20090133162 申请日期 2009.06.02
申请人 发明人
分类号 G01R31/28;H01L21/822;H01L27/04 主分类号 G01R31/28
代理机构 代理人
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