发明名称 |
8-transistor SRAM cell design with Schottky diodes |
摘要 |
An 8-transistor SRAM cell which includes two pull-up transistors and two pull-down transistors in cross-coupled inverter configuration to form two inverters for storing a single data bit, wherein each of the inverters includes a Schottky diode; first and second pass gate transistors having a gate terminal coupled to a write word line and a source or drain of each of the pass gate transistors coupled to a write bit line; and first and second read transistors coupled to the two pull-up and two pull-down transistors, one of the read transistors having a gate terminal coupled to a read word line and a source or a drain coupled to a read bit line. In a preferred embodiment, the 8-transistor SRAM cell has column select writing enabled for writing a value to the 8-transistor SRAM cell without inadvertently also writing a value to another 8-transistor SRAM cell.
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申请公布号 |
US8531871(B2) |
申请公布日期 |
2013.09.10 |
申请号 |
US201213345619 |
申请日期 |
2012.01.06 |
申请人 |
CHANG LELAND;LAUER ISAAC;LIN CHUNG-HSUN;SLEIGHT JEFFREY W.;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHANG LELAND;LAUER ISAAC;LIN CHUNG-HSUN;SLEIGHT JEFFREY W. |
分类号 |
G11C11/00;G11C11/417 |
主分类号 |
G11C11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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