| 摘要 |
PROBLEM TO BE SOLVED: To provide a clock and data recovery (CDR) system and method for recovering timing information and data from a serial data stream.SOLUTION: The CDR system (100) comprises a sampling circuit (105) that produces a recovered clock/data signal; and an interleaving feedback network (110). The feedback network comprises: a logic circuit (115) that produces control signals based on the recovered signal; a first multiplexer (120) that selects from four phases of a global clock signal based on a control signal; a first delay-locked loop (130) having a first set of delay cells coupled to a second multiplexer that produces a delayed signal based on the selected global clock signal; and a second delay-locked loop (135) having a second set of delay cells that produces a set of phase-shifted feedback signals. |
