发明名称 MICROCOMPUTER AND RESET VECTOR MANAGEMENT METHOD OF MICROCOMPUTER
摘要 PROBLEM TO BE SOLVED: To provide a microcomputer that accommodates both users who read a reset vector from 0 address and those who read it from an arbitrary address.SOLUTION: A microcomputer of the present invention which is provided with a flash memory macro includes: a flash control macro that performs inversion write-in of a reset vector to the flash memory macro; and a reset vector control circuit that performs inversion readout of the reset vector from the flash memory macro.
申请公布号 JP2013175009(A) 申请公布日期 2013.09.05
申请号 JP20120038476 申请日期 2012.02.24
申请人 RENESAS ELECTRONICS CORP 发明人 TERAUCHI YOJI
分类号 G06F15/78 主分类号 G06F15/78
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