发明名称
摘要 There is provided a testing system for testing a plurality of semiconductor chips formed on a single semiconductor wafer. The testing system includes a wafer substrate, a plurality of wafer connector terminals that are provided on the wafer substrate in such a manner that one or more wafer connector terminals correspond to each of the semiconductor chips, where each wafer connector terminal is to be electrically connected to an input/output terminal of a corresponding semiconductor chip, a plurality of circuit units that are provided on the wafer substrate in such a manner that one or more circuit units corresponds to each of the semiconductor chips, where each circuit unit generates a test signal to be used for testing a corresponding semiconductor chip and supplies the test signal to the corresponding semiconductor chip to test the corresponding semiconductor chip, and a controller that generates a control signal used to control the plurality of circuit units.
申请公布号 JP5282082(B2) 申请公布日期 2013.09.04
申请号 JP20100505090 申请日期 2008.03.26
申请人 发明人
分类号 G01R1/073;H01L21/66 主分类号 G01R1/073
代理机构 代理人
主权项
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