发明名称 TIME-LAG DIGITAL CONVERTER
摘要 PROBLEM TO BE SOLVED: To acquire a digital value with high conversion accuracy without performing calibration or the like on the digital value.SOLUTION: A time-lag digital converter comprises an FET switch 8 which is turned on during a period in which a conversion starting signal is inputted, a constant current source 9 which generates a constant current I/Nand extracts electric charges charging a capacitor 6 when the FET switch 8 is turned on, a comparator 10 which outputs a conversion ending signal when a ramp voltage Vof the capacitor 6 becomes equal to a ground potential, and a counter 12 which counts clock of a term Tduring a period from input of the conversion starting signal to the output of the conversion ending signal from the comparator 10.
申请公布号 JP2013168786(A) 申请公布日期 2013.08.29
申请号 JP20120030609 申请日期 2012.02.15
申请人 MITSUBISHI ELECTRIC CORP 发明人 TAKAHASHI TAKANORI;HIRAI AKIHITO;TANIGUCHI EIJI
分类号 H03M1/50;H03K4/02;H03K5/26 主分类号 H03M1/50
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