| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory device in which the parasitic resistance and the parasitic capacitance of bit lines and word lines are low.SOLUTION: A memory device comprises: first to fourth memory cell arrays which overlap with one of a point-symmetrically arranged pair of bit line driver circuits, with one of a point-symmetrically arranged pair of word line driver circuits, with the other of the bit line driver circuits, and with the other of the word line driver circuits; a first connection wiring which electrically connects each of the pair of bit line driver circuits and a plurality of bit lines through a pair of first connection points provided in each of a central region near the boundary between the first and second memory cell arrays and a central region near the boundary between the third and fourth memory cell arrays; and a second connection wiring which electrically connects each of the pair of word line driver circuits and a plurality of word lines through second connection points provided in a central region near the boundary between the first and fourth memory cell arrays and a central region near the boundary between the second and third memory cell arrays. |
