发明名称 Exponentiation system
摘要 <p>A method and an apparatus for cryptographic computation, the apparatus comprising, first, second and third registers, which are configured to hold respective first, second and third values, which are to be updated during the computation; and a processor, which is configured to receive an exponent d as a sequence of n bits having respective bit values, to initialize the first, second and third registers using a value of a base x that is to be exponentiated, and to perform calculations successively, for each bit in the exponent up to a final bit in the sequence, the calculations comprising: selecting one of the first and second registers responsively to a bit value of the bit; computing a product of the third value with a value that is stored in the selected one of the registers, and storing the product in the selected one of the registers; and computing a square of the third value and storing the square in the third register, wherein: the processor is configured, after completing the calculations up to the final bit, to compare a first result based on the first and second values and a second result based on the third value, and to return x d based on the calculations if the first and second results are equal, or to return an error indication if the first and second results are not equal; the n bits of the exponent comprise a least significant bit d 0 and a most significant bit d n -1 = 1; the processor is configured to perform the calculations successively for each bit d i in the sequence from d 0 through d n -2 .</p>
申请公布号 EP2629195(A1) 申请公布日期 2013.08.21
申请号 EP20130167629 申请日期 2010.09.21
申请人 NDS LIMITED 发明人 BELENKY, YAACOV;GEYZEL, ZEEV
分类号 G06F7/72 主分类号 G06F7/72
代理机构 代理人
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