发明名称 |
Interrupt handling apparatus and method for equal-model processor and processor including the interrupt handling apparatus |
摘要 |
An interrupt support determining apparatus and method for an equal-model processor, and a processor including the interrupt support determining apparatus are provided. The interrupt support determining apparatus determines whether an instruction input to a processor decoder is a multiple latency instruction, compares a current latency of the instruction with a remaining latency if the instruction is a multiple latency instruction, and updates the current latency to the remaining latency if the current latency is greater than the remaining latency.
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申请公布号 |
US8516231(B2) |
申请公布日期 |
2013.08.20 |
申请号 |
US20100695266 |
申请日期 |
2010.01.28 |
申请人 |
PARK IL-HYUN;RYU SOO-JUNG;YOO DONG-HOON;CHO YEON-GON;EGGER BERNHARD;SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
PARK IL-HYUN;RYU SOO-JUNG;YOO DONG-HOON;CHO YEON-GON;EGGER BERNHARD |
分类号 |
G06F15/00;G06F9/00;G06F9/44 |
主分类号 |
G06F15/00 |
代理机构 |
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代理人 |
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地址 |
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