READING CIRCUIT OF NONVOLATILE MEMORY DEVICE

摘要

PURPOSE: A readout circuit of a non-volatile memory device is provided to control each gate of an NMOS transistor with the same voltage by applying a voltage output from a single bias circuit, thereby having a large readout margin for distinguishing between data 0 and 1. CONSTITUTION: A memory element (11) has a source connected to a ground voltage (20) and a gate connected to one end of a first memory element selection switch (15). A select gate transistor (12) is controlled to be turned on and off by a select gate selection control signal (17). A second memory element selection switch (14) is controlled to be turned on and off by a memory element selection control signal. A current mirror circuit includes a first PMOS transistor and a second PMOS transistor. A first bias circuit (30) has an output terminal connected to a gate of a first NMOS transistor and the other end of the first memory element selection switch. [Reference numerals] (30) Bias circuit A