发明名称 |
Semiconductor device, semiconductor device testing method, and data processing system |
摘要 |
To include one or a plurality of internal signal lines that electrically connects an interface chip to a core chip. The interface chip includes a first circuit that outputs a current to an internal wiring and the core chip includes a second circuit that outputs a current to the first internal signal line. The interface chip includes a determination circuit that has a first input terminal connected to the internal wiring through which the current outputted by the first circuit flows and a second input terminal connected to an end of the first internal signal line in the interface chip, and outputs a voltage according to a potential difference between a voltage of the first input terminal and a voltage of the second input terminal.
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申请公布号 |
US8498831(B2) |
申请公布日期 |
2013.07.30 |
申请号 |
US20100923831 |
申请日期 |
2010.10.08 |
申请人 |
IDE AKIRA;YOKO HIDEYUKI;SHIBATA KAYOKO;TANAMACHI KENICHI;EGUCHI TAKANORI;SHIGEZANE YASUYUKI;OGAWA NAOKI;HIDAKA KAZUO;ELPIDA MEMORY, INC. |
发明人 |
IDE AKIRA;YOKO HIDEYUKI;SHIBATA KAYOKO;TANAMACHI KENICHI;EGUCHI TAKANORI;SHIGEZANE YASUYUKI;OGAWA NAOKI;HIDAKA KAZUO |
分类号 |
G06F19/00 |
主分类号 |
G06F19/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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