发明名称 SYSTEM AND METHOD FOR HIERARCHICAL ADAPTIVE DYNAMIC EGRESS PORT AND QUEUE BUFFER MANAGEMENT
摘要 PURPOSE: A system for managing a queue buffer and a hierarchical adaptive dynamic output port and a method thereof are provided to efficiently use buffering resources through adaptive queue limitations induced from an adaptive port limitation. CONSTITUTION: A switch (100) includes a plurality of input ports (110-1-110-4) and each input port is connected with other network devices. The input ports provide 10 GbE connection with other switches in a data center. The switch includes output ports (140-1-140-4) and each output port is connected with other network devices. The input ports and the output ports perform an I/O role of the switch. A processing core of the switch includes packet processing units (120-1,120-2) and a memory manager (130). [Reference numerals] (130) Memory manager; (AA) Processing core
申请公布号 KR20130085918(A) 申请公布日期 2013.07.30
申请号 KR20120105012 申请日期 2012.09.21
申请人 BROADCOM CORPORATION 发明人 KWAN BRUCE;AGARWAL PUNEET
分类号 H04L12/70;G06F12/00 主分类号 H04L12/70
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