发明名称 Method for generating wiring pattern data
摘要 A method includes connecting in a wiring area a plurality of basic block patterns which include a plurality of track patterns extending to one direction and being disposed at a prescribed pitch in an intersection direction intersecting the one direction to generate a plurality of parallel wiring patterns, each of which includes the track patterns connected together; generating a wiring route running on a track pattern; cutting away a track pattern terminal end, on which no wiring route runs, out of track pattern terminal ends of a track pattern including a route end of the wiring route and an adjacent track pattern connected to a track pattern start end of the track pattern concerned; and generating a wiring pattern data including a block pattern identifier corresponding to a basic block pattern out of the basic block patterns in the wiring area and a layout position of the basic block pattern.
申请公布号 US8495549(B2) 申请公布日期 2013.07.23
申请号 US201213483844 申请日期 2012.05.30
申请人 MARUYAMA TAKASHI;SUGATANI SHINJI;FUJITSU SEMICONDUCTOR LIMITED 发明人 MARUYAMA TAKASHI;SUGATANI SHINJI
分类号 G06F17/50 主分类号 G06F17/50
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