LAYOUTS FOR MEMORY AND LOGIC CIRCUITS IN A SYSTEM-ON-CHIP
摘要
An integrated circuit includes a plurality of memory circuits (300) and a plurality of logic circuits (302). The plurality of memory circuits is arranged on a die (600) along a plurality of rows and a plurality of columns. Each memory circuit includes a plurality of memory cells. The plurality of logic circuits is arranged on the die between the plurality of memory circuits along the plurality of rows and the plurality of columns. The plurality of logic circuits is configured to communicate with one or more of the memory circuits.
申请公布号
WO2013078294(A3)
申请公布日期
2013.07.18
申请号
WO2012US66236
申请日期
2012.11.21
申请人
MARVELL WORLD TRADE LTD.;HOLT, JOSEPH;MADER, ROY;GREINER, BRANDON;ANDERSON, SCOTT B.
发明人
HOLT, JOSEPH;MADER, ROY;GREINER, BRANDON;ANDERSON, SCOTT B.