发明名称 METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING IN-LINE DIAGNOSTICS PERFORMED ON LOW-K DIELECTRIC LAYERS
摘要 Methods are provided for fabricating integrated circuits. In accordance with one embodiment an integrated circuit feature is formed overlying a semiconductor substrate. A layer of low dielectric constant insulator is deposited overlying the circuit feature and is subjected to a plasma environment. Properties of the low dielectric constant material are measured by scatterometry. The low dielectric constant material is heated to drive off adsorbed water and then the properties of the material are remeasured by scatterometry. The results of the measuring and the remeasuring are compared to determine whether the low dielectric constant material was damaged by the plasma environment.
申请公布号 US2013177999(A1) 申请公布日期 2013.07.11
申请号 US201213348441 申请日期 2012.01.11
申请人 SHAMIRYAN DENIS;GLOBALFOUNDRIES INC. 发明人 SHAMIRYAN DENIS
分类号 H01L21/66 主分类号 H01L21/66
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