发明名称 |
SEMICONDUCTOR MEMORY TEST METHOD AND SEMICONDUCTOR MEMORY |
摘要 |
A first erase test is performed by applying an erase pulse to series of memory cells which are included in a memory cell array and which are divided into a plurality of groups until the appearance of a group for which the determination that erase is completed is made. A second erase test is performed on other series of memory cells including the series of memory cells on the basis of the number of erase pulses at the time of detecting a group for which the determination that erase is completed is made first. |
申请公布号 |
US2013170308(A1) |
申请公布日期 |
2013.07.04 |
申请号 |
US201213680913 |
申请日期 |
2012.11.19 |
申请人 |
FUJITSU SEMICONDUCTOR LIMITED;FUJITSU SEMICONDUCTOR LIMITED |
发明人 |
MORI KAORU;YAGISHITA YOSHIMASA;AOKI HAJIME |
分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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