发明名称 Automatic anomaly detection for HW debug
摘要 A method for identifying an anomaly in an electronic system includes receiving, from a computer-readable storage medium, a plurality of entries from a successful simulation test of the electronic system, each of the plurality of entries including information about simulation time. The method also includes, with one or more computer processors, determining time sequence relationship between pairs of entries selected from the plurality of entries and identifying allowable sequences of entries using information related to the first plurality of entries and the time sequence relationship. The method includes receiving a second plurality of entries from a failed simulation test of the electronic system, each of the second plurality of entries including information about simulation time. The method includes analyzing the second plurality of entries and identifying one or more anomalies in the electronic system based on the analysis of the failed simulation test.
申请公布号 US8478575(B1) 申请公布日期 2013.07.02
申请号 US20100824066 申请日期 2010.06.25
申请人 KASHAI YARON;CADENCE DESIGN SYSTEMS, INC. 发明人 KASHAI YARON
分类号 G06F17/50;G01R31/28;G06F11/30;G06G7/48;G21C17/00 主分类号 G06F17/50
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