| 摘要 |
<p>Disclosed is a PoP encapsulation structure, comprising at least two layers of carrier boards (109, 106, 103) sequentially stacked and encapsulated. The top faces of the carrier boards (109, 106, 103) are provided with chips (108, 105, 102), and the bottom faces of the carrier boards (106, 103) other than the first layer of carrier board (109) are provided with heat dissipation plates (107, 104). The bottom face of the first layer of carrier board (109) is provided with a pad (110) soldered to a system board. The chips (108, 105) on the carrier boards (109, 106) other than the top layer of the carrier board (103) are attached to the heat dissipation plates (107, 104) adjacent to the chips (108, 105). In the structure, heat dissipation plates are disposed on the bottom faces of the carrier boards other than the first layer of carrier board so as to dissipate heat from the chips (bare silicon wafers or packaged chips) on the carrier board above. The heat dissipation plates increase the heat dissipation area on the chips, greatly improving heat dissipation capability of PoP stack encapsulation, breaking the bottleneck of high density and miniaturization of PoP stack encapsulation, and improving the encapsulation density of the PoP stack encapsulation.</p> |
