发明名称 BUS STRUCTURE OF FPGA BASED CONTROLER
摘要 PURPOSE: A bus structure of an FPGA(Field Programmable Gate Array) based controller is provided to eliminate the necessity of an OS(Operating System) by not implementing a control function in an FPGA. CONSTITUTION: An external bus is connected to an external signal related to an input/output module. An internal bus is connected to a signal between the slots related to a general calculation module, a special calculation module, or a communication module which operates the input/output module. The internal bus includes a slave bus and a monitoring/control bus. [Reference numerals] (AA) Field input/output
申请公布号 KR20130068285(A) 申请公布日期 2013.06.26
申请号 KR20110135284 申请日期 2011.12.15
申请人 KOREA ATOMIC ENERGY RESEARCH INSTITUTE;DOOSAN HEAVY INDUSTRIES & CONSTRUCTION CO., LTD. 发明人 CHOI, JONG GYUN;LEE, DONG YOUNG;KIM, CHANG HWOI;PARK, WON MAN;CHEON, SE WOO;KIM, JANG YEOL;OH, IN SEOK;LEE, JANG SOO;KWON, KEE CHOON;LEE, SUNG JIN;KIM, BONG SEOK
分类号 G06F13/40;G06F13/14;H03K19/173 主分类号 G06F13/40
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