| 摘要 |
A method of analyzing of a semiconductor integrated circuit includes inspecting a physical defect in a semiconductor wafer, subjecting the semiconductor integrated circuit chip to a logic test and extracting a malfunctioning chip, analyzing a detected signal observed from the malfunctioning chip by an analyzer, obtaining the layer and coordinates of a circuit related the detected signal, collating the physical defect with the circuit, and identifying the physical defect associated with the circuit. The layer and coordinates of the circuit is extracted using design data. An inspection step identifying information is collated with the layer of the circuit, and an in-chip coordinates of the physical defect is collated with the coordinated of the circuit.
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