发明名称 SWITCH BLOCK IN FPGA
摘要 PURPOSE: A switch block circuit of a field programmable gate array is provided to efficiently reconfigure according to a purpose of use and to utilize configuration memories not used in a specific operation mode. CONSTITUTION: A switch block includes a configuration memory unit (M40-M47), a switching unit(401-408) and a selection unit(431-434). The configuration memory unit has first group memories and second group memories. The switching unit has first group switching transistors switched according to a stored value in the first group memories and second group switching transistors switched according to a stored value in the second group memories. The selection unit connects the second group memories and the second group switching transistors to correspond with each other according to an operation mode.
申请公布号 KR20130066267(A) 申请公布日期 2013.06.20
申请号 KR20110133021 申请日期 2011.12.12
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 CHO, HAN JIN;BAE, YOUNG HWAN
分类号 H03K17/693;H03K19/173 主分类号 H03K17/693
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