发明名称 Tristate gate
摘要 The present invention relates to a tristate gate (1000, 2000) comprising an output port (1400, 2400) and at least two transistors (1200, 1300, 2200, 2300), each having at least a first and a second gate, configured such that a high-impedance value (Z) on the output port is set by controlling the threshold voltage of at least one of the transistors.
申请公布号 EP2605407(A1) 申请公布日期 2013.06.19
申请号 EP20110290575 申请日期 2011.12.13
申请人 SOITEC 发明人 FERRANT, RICHARD
分类号 H03K19/094 主分类号 H03K19/094
代理机构 代理人
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