发明名称 |
Voltage supply for I-Q mismatch calibration |
摘要 |
<p>Techniques are provided for reducing mismatch between the in-phase (I) and quadrature (Q) channels of a communications transmitter or receiver. In an exemplary embodiment, separate voltages are applied to bias the gates or bulks of the transistors in a mixer of the I channel versus a mixer of the Q channel. In another exemplary embodiment, separate voltages are applied to bias the common-mode reference voltage of a transimpedance amplifier associated with each channel. Techniques are further provided for deriving bias voltages to minimize a measured residual sideband in a received or transmitted signal, or to optimize other parameters of the received or transmitted signal. Techniques for generating separate bias voltages using a bidirectional and unidirectional current digital-to-analog converter (DAC) are also disclosed.</p> |
申请公布号 |
EP2605464(A1) |
申请公布日期 |
2013.06.19 |
申请号 |
EP20130159605 |
申请日期 |
2008.12.15 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
CHOKSI, OJAS M.;BOSSU, FREDERIC |
分类号 |
H04L27/00;H03M1/00;H03M1/66 |
主分类号 |
H04L27/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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