发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a memory mounting an internal power circuit, which achieves stable supply of an internal power while suppressing increase in power consumption by reducing a circuit area when an internal power is generated based on an external power and supplied to the memory. <P>SOLUTION: In a region in which an external power 102 is at a normal voltage, an internal power 103 is generated by only using an internal voltage depression power block 101. And in a region in which the external power 102 is at a low voltage, the internal power 103 is generated by using an internal voltage rising power block 112 in addition to the internal voltage depression power block 101. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013118207(A) 申请公布日期 2013.06.13
申请号 JP20100072332 申请日期 2010.03.26
申请人 PANASONIC CORP 发明人 NAKAMURA TOSHIHIRO;YAMAZAKI HIROYUKI
分类号 H01L21/822;G11C11/4074;H01L21/8242;H01L27/04;H01L27/10;H01L27/108;H02M3/00 主分类号 H01L21/822
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