Single-trigger low-energy flip-flop circuit

摘要

One embodiment of the present invention sets forth a technique for technique for capturing and storing a level of an input signal using a single-trigger low-energy flip-flop circuit that is fully-static and insensitive to fabrication process variations. The single-trigger low-energy flip-flop circuit presents only three transistor gate loads to the clock signal and none of the internal nodes toggle when the input signal remains constant. The output signal Q is set or reset at the rising clock edge using a single- trigger subcircuit. A set or reset may be armed while the clock signal is low, and the set or reset is triggered at the rising edge of the clock.