| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a level shift circuit that implements a low voltage operation. <P>SOLUTION: An input potential changes between GND and VDD. VDDO higher than VDD is applied to a power terminal. The level shift circuit includes a clamp circuit and a connection control circuit. The clamp circuit includes: a first NMOS transistor having a source connected to a first node, a drain connected to a P side output terminal and a gate connected to the power terminal; and a first PMOS transistor having a source connected to the first node, a drain connected to an N side output terminal and a gate connected to a ground terminal. When the input potential is one of GND and VDD, the connection control circuit applies VDDO to the P side output terminal, and interrupts an electrical connection between the N side output terminal and the ground terminal. When the input potential is the other of GND and VDD, the connection control circuit applies GND to the N side output terminal, and interrupts an electrical connection between the P side output terminal and the power terminal. <P>COPYRIGHT: (C)2013,JPO&INPIT |
