发明名称 Hardware Synthesis Using Thermally Aware Scheduling And Binding
摘要 Technologies are generally described for hardware synthesis using thermally aware scheduling and binding. Multiple versions of a hardware design may be generated, each having variations of schedule and binding results. The scheduling and binding may be performed such that thermal profiles of the multiple versions have thermal peaks that are distant between the versions. The increased physical distance between the thermal peaks of the versions can give the versions unique thermal characteristics. A schedule of rotation between the multiple versions of the design may be constructed such that the thermal profile of the integrated circuit balances out during operation. A linear programming framework may be used to analyze the multiple designs and construct a thermally aware rotation scheduling and binding. For example, the K most efficient versions may be selected and then durations for operating each version within a rotation may be determined.
申请公布号 US2013145335(A1) 申请公布日期 2013.06.06
申请号 US201313751811 申请日期 2013.01.28
申请人 EMPIRE TECHNOLOGY DEVELOPMENT LLC;EMPIRE TECHNOLOGY DEVELOPMENT LLC 发明人 KOUSHANFAR FARINAZ;POTKONJAK MIODRAG
分类号 G06F17/50 主分类号 G06F17/50
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