发明名称 CLOCK GENERATOR
摘要 PURPOSE: A clock generator is provided to compensate for frequency errors according to changes in a power supply voltage by controlling a current load, which is located on the upper end thereof, and a current source, which is located on the lower end around a differential amplifier. CONSTITUTION: A clock generator comprises a replica bias part(210) and a delay cell part(220). The replica bias part supplies a bias voltage to each delay cell in the delay cell part. The replica bias part comprises a current mirror part, a differential amplification part, an enable part, and an operational amplifier. The delay cell generates a desired frequency clock regardless of changes in a power supply voltage by controlling the number of opened channels of a current source or a current load according to the power supply voltage. [Reference numerals] (210) Replica bias part
申请公布号 KR101270754(B1) 申请公布日期 2013.06.03
申请号 KR20110048664 申请日期 2011.05.23
申请人 发明人
分类号 H03K5/14;H03F3/45;H03K5/13 主分类号 H03K5/14
代理机构 代理人
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