| 摘要 |
<p>This frequency switching circuit includes: a first counting circuit which counts the number of pulses of a first clock signal in a predetermined period in order to generate a first count value; a second counting circuit which counts the number of pulses of a second clock signal in a predetermined period in order to generate a second count value; a buffer into which data is written in synchronization with the pulses of the first clock signal and out of which data is read in synchronization with the pulses of the second clock signal; and a control circuit which, with respect to a number of pulses equal to the second count value among consecutive pulses of the first clock signal which are of an equal number to the first count value, sets the buffer to a write-enabled state, and with respect to the remaining pulses, sets the buffer to a write-disabled state.</p> |
