发明名称 |
CMOS Image Sensor Big Via Bonding Pad Application for AICu Process |
摘要 |
An integrated circuit includes a substrate having a bonding pad region and a non-bonding pad region. A relatively large via, called a "big via," is formed on the substrate in the bonding region. The big via has a first dimension in a top view toward the substrate. The integrated circuit also includes a plurality of vias formed on the substrate in the non-bonding region. The plurality of vias each have a second dimension in the top view, the second dimension being substantially less than the first dimension.
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申请公布号 |
US2013134543(A1) |
申请公布日期 |
2013.05.30 |
申请号 |
US201213728710 |
申请日期 |
2012.12.27 |
申请人 |
LTD. TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY,;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
TSENG UWAY;WU LIN-JUNE;LIN YU-TING |
分类号 |
H01L27/146 |
主分类号 |
H01L27/146 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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