发明名称 Binary logic unit and method to operate a binary logic unit
摘要 A binary logic unit to apply any Boolean operation on two input signals (va, vb) is described, wherein any Boolean operation to be applied on the input signals (va, vb) is defined by a particular combination of well defined control signals (ctl0, ctl1, ctl2, ctl3), wherein the input signals (va, vb) are used to select a control signal (ctl0, ctl1, ctl2, ctl3) as an output signal (vo) of the binary logic unit representing the result of a particular Boolean operation applied on the two input signals (va, vb). Furthermore a method to operate such a binary logic unit is described.
申请公布号 US8452824(B2) 申请公布日期 2013.05.28
申请号 US20070872846 申请日期 2007.10.16
申请人 GEMMEKE TOBIAS;PREISS JOCHEN;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GEMMEKE TOBIAS;PREISS JOCHEN
分类号 G06F15/00 主分类号 G06F15/00
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