发明名称 POWER SAVING METHODS FOR USE IN A SYSTEM OF SERIALLY CONNECTED SEMICONDUCTOR DEVICES
摘要 A semiconductor device comprising (i) internal circuitry for outputting at least one internal clock signal and at least one internal data/control signal for transmission to a next device in a chain of semiconductor devices; (ii) data/control output circuitry for outputting at least one output data/control signal from the at least one internal data/control signal and for releasing the at least one output data/control signal towards the next device via at least one output data/control signal line, the at least one output data/control signal having a first dynamic range; and (iii) clock output circuitry for generating at least one output clock signal from the at least one internal clock signal and for releasing the at least one output clock signal towards the next device via at least one output clock signal line, the at least one output clock signal having a dynamic range different than the first dynamic range.
申请公布号 US2013128678(A1) 申请公布日期 2013.05.23
申请号 US201213425801 申请日期 2012.03.21
申请人 PYEON HONG BEOM 发明人 PYEON HONG BEOM
分类号 G11C7/00 主分类号 G11C7/00
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