发明名称 DATA-MASKED ANALOG AND DIGITAL READ FOR RESISTIVE MATERIALS
摘要 <p>An analog read circuit measures the resistance of each of a plurality of bits in an array of resistive memory elements. Data stored within a latch determines whether to selectively enable the analog read circuit. In an alternate embodiment, a sense amplifier is coupled to the latch and the array, and the data stored in the latch determines whether to selectively enable the sense amplifier.</p>
申请公布号 WO2013075099(A1) 申请公布日期 2013.05.23
申请号 WO2012US65848 申请日期 2012.11.19
申请人 EVERSPIN TECHNOLOGIES INC. 发明人 ALAM, SYED M.;ANDRE, THOMAS
分类号 G11C7/02 主分类号 G11C7/02
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