| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a clock distribution circuit that implements a high precision adjustment of clock phase by minimizing an effect of a variation of a feedback path. <P>SOLUTION: A clock distribution circuit 21 has: a clock generation circuit for generating a clock signal; a clock distribution network 22 in which the clock signal is distributed; and a sequential circuit 26 adapted to operate on the clock signal distributed through a branch point N1 of the clock distribution network. The clock distribution circuit further has a clock generation circuit configured to receive the clock signal branched at the branch point as a feedback signal, and output the clock signal to the clock distribution network on the basis of the input feedback signal and a reference clock signal. The branch point is disposed at a clock driver near the clock generation circuit among clock drivers 25 preceding sequential circuits in the clock distribution network. <P>COPYRIGHT: (C)2013,JPO&INPIT |
