| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a content addressable memory in which false retrieval can be suppressed. <P>SOLUTION: A content addressable memory comprises R pieces of distance/time conversion circuits DT<SB POS="POST">1</SB>to DT<SB POS="POST">R</SB>. Each of the R pieces of distance/time conversion circuits DT<SB POS="POST">1</SB>to DT<SB POS="POST">R</SB>includes a NAND circuit 40 and N-bit stages 41-4k. Each of the N-bit stages 41-4k oscillates an oscillation signal by delaying a signal from the NAND circuit 40 with a longer delay time as a distance between reference data and retrieval data increases, and oscillates the oscillation signal by delaying the signal from the NAND circuit 40 with a shorter delay time as the distance between the reference data and the retrieval data decreases. Among R pieces of oscillation signals outputted from the distance/time conversion circuits DT<SB POS="POST">1</SB>to DT<SB POS="POST">R</SB>, an oscillation signal which is changed on the earliest stage is detected as an oscillation signal of a Winner row. <P>COPYRIGHT: (C)2013,JPO&INPIT |
