发明名称 Bandwidth control for a direct memory access unit within a data processing system
摘要 A method for controlling bandwidth in a direct memory access (DMA) unit of a computer processing system, the method comprising: assigning a DMA job to a selected DMA engine; starting a source timer; and issuing a request to read a next section of data for the DMA job. If a sufficient amount of the data was not obtained, allowing the DMA engine to wait until the source timer reaches a specified value before continuing to read additional data for the DMA job.
申请公布号 US8447897(B2) 申请公布日期 2013.05.21
申请号 US201113168331 申请日期 2011.06.24
申请人 XU KUN;JOKINEN TOMMI M.;KRAMER DAVID B.;FREESCALE SEMICONDUCTOR, INC. 发明人 XU KUN;JOKINEN TOMMI M.;KRAMER DAVID B.
分类号 G06F3/00;G06F5/00 主分类号 G06F3/00
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