| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an FPGA internal circuit modification method and an image forming apparatus that eliminate a waiting time in control after dynamic rewriting of an FPGA internal circuit. <P>SOLUTION: The image forming apparatus includes: detection means for detecting a signal received from a plurality of connectors; signal detection notification means for notifying an ASIC of the signal detection by the detection means; rewriting means for, during an operation of one internal circuit, rewriting another internal circuit on the basis of internal circuit rewrite information read out from any one of a plurality of memories by the ASIC in response to the signal detection notification from the signal detection notification means; rewrite completion notification means for notifying the ASIC of the completion of rewriting another internal circuit; and circuit switch means for switching an output switch circuit and an output modification circuit in synchronism with the rewrite completion notification from the rewrite completion notification means. <P>COPYRIGHT: (C)2013,JPO&INPIT |
