A METHOD OF PROGRAMMING A SPLIT GATE NON-VOLATILE FLOATING GATE MEMORY CELL HAVING A SEPARATE ERASE GATE

摘要

During the programming of a non-volatile memory cell, a voltage pulse is applied to an erase gate of the cell a delay time after voltage pulses are applied to the other elements of the cell. The erase gate voltage pulse ends at substantialy the same time as the other voltage pulses end.