发明名称 Integrated circuit having a scan chain and testing method for a chip
摘要 An IC having a scan chain and a testing method for a chip, comprising a first interface group, a second interface group and a scan data selector. The first interface group and the second interface group each comprise at least two input/output (I/O) interfaces which can be packaged as external pins of the IC. The I/O interfaces of the first interface group are connected to input terminals of the scan data selector in one-to-one correspondence, and an output terminal of the scan data selector is connected to a scan data input terminal of the scan chain. A scan data output terminal of the scan chain is connected to the I/O interfaces of the second interface group.
申请公布号 US8438439(B2) 申请公布日期 2013.05.07
申请号 US201213359015 申请日期 2012.01.26
申请人 XIE WUHONG;ACTIONS SEMICONDUCTOR CO., LTD. 发明人 XIE WUHONG
分类号 G01R31/28 主分类号 G01R31/28
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