发明名称 Video signal output circuit
摘要 Disclosed is a video signal output circuit including: a clamp circuit; a first differential amplifying circuit; a dividing circuit; and an offset circuit which adds or subtracts a predetermined offset voltage to or from a bias voltage, a reference voltage, or a base reference voltage generated by the dividing circuit so as to supply an offset voltage added/subtracted voltage to the clamp circuit or the first differential amplifying circuit, wherein the offset circuit includes a pnp bipolar transistor and an npn bipolar transistor, and outputs a difference voltage corresponding to a difference between a base-emitter voltage of the pnp bipolar transistor and a base-emitter voltage of the npn bipolar transistor.
申请公布号 US8432494(B2) 申请公布日期 2013.04.30
申请号 US201113304961 申请日期 2011.11.28
申请人 MABUCHI SHIGEKI;MITSUMI ELECTRIC CO., LTD. 发明人 MABUCHI SHIGEKI
分类号 H04N5/16;H04N5/18 主分类号 H04N5/16
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