POWER SUPPLY GATING ARRANGEMENT FOR PROCESSING CORES

摘要

PURPOSE: A power source gating configuration for a processing core is provided to reduce power voltage provided to the processing core by causing a voltage drop recognized in high current made by power of the core or parasitic impedance and a power gate. CONSTITUTION: A power circuit has load voltage feedback input. A power gate(7) is connected to the power circuit and selectively provides power to a processing core(3). A switch(8) has a local state and a remote state. The switch alternately routes a local sensing point of a supply side of the power gate and a remote sensing point of a load side of the power gate as feedback input of the power circuit. A timing logic and driver circuit(10) controls the power gate and the switch. The power circuit includes a voltage regulator control loop in which load voltage feedback input is connected. The control loop has a tunable compensation network. [Reference numerals] (10) Timing logic and switch drivers; (3) Processing core 1; (4) Power manager; (5) Control loop compensation network; (AA) Controlled power source; (BB) Modulator; (CC) Local; (DD) Remote; (EE) Processing core 2;